Erbium SOC, Architecture, Design and Verification (Vijayvithal Someracharya Jahagirdar) @FOSSiFoundation

Uploaded May 2026 | Updated September 2026, 2 weeks ago

Erbium is the first tapeout of AIFoundry's open-source manycore ASIC platform for parallel computing acceleration. This 8C16T RISC-V SOC with Vector and Tensor extensions is targeted towards the EdgeAI application space. In this talk we will cover

The ISA, Memory and SOC design.
The design process.
Verification Flow.
The current state of opensourcing the design.
Attendees will learn about the opensource components that can be reused in their design and contributing to the growing community of Silicon and Software developers at AIFoundry.

Erbium SOC, Architecture, Design and Verification (Vijayvithal Someracharya Jahagirdar)

Tiliqua - Accessible, Reconfigurable Audio DSP Platform (Sebastian Holzapfel)

Extending RISC-V with SCAIE-V (Tammo Mürmann)

Open source chip design: for fun and for profit (Andreas Olofsson)

Open-Source FPGAs: Tools, Flows, and Visualization (Alex Singer)

Simulating Partial Reconfiguration in cocotb via Multi-Process DPI Barriers (Chaitanya Sharma)

From Tapeouts to Products: Why Open-Source Silicon Must Solve Real Problems to Survive (M. Kassem)

Vaporview - 2026 updates (Lloyd Ramseyer)

Panamax FPGA - An Open Source FPGA on SKY130 (Leo Moser)

Five years of Spade - A modern Hardware description language (Frans Skarman)

Open-source Hardware for Real-Time Applications - Francisco Wilken (Latch-Up 2023)

Substrate: Designing Highly Configurable Analog and Mixed-Signal Circuit Generators (Rahul Kumar)