Uploaded May 2026 | Updated September 2026, 2 weeks ago
Designing new FPGAs, or embedding FPGA logic into a larger SoC, has historically been difficult because expensive full custom design was needed to create the physical FPGA and CAD tools did not exist for the new architecture. Open-source tools like Verilog to Routing (VTR), OpenFPGA, and Zero ASIC's Logik flow are changing this, dramatically lowering the barrier to building and using custom FPGA architectures. This talk gives a brief tour of these open-source tools, then highlights recent work by the author: a fast, standalone visualizer for VTR architecture descriptions that makes debugging and designing custom FPGA models easier.
Designing new FPGAs, or embedding FPGA logic into a larger SoC, has historically been difficult because expensive full custom design was needed to create the physical FPGA and CAD tools did not exist for the new architecture. Open-source tools like Verilog to Routing (VTR), OpenFPGA, and Zero ASIC's Logik flow are changing this, dramatically lowering the barrier to building and using custom FPGA architectures. This talk gives a brief tour of these open-source tools, then highlights recent work by the author: a fast, standalone visualizer for VTR architecture descriptions that makes debugging and designing custom FPGA models easier.
