KiCad Schematic Best Practices β€” Hierarchy, Labels, Net Names, Power Flags & Annotation @TechExplorations_
KiCad Schematic Best Practices β€” Hierarchy, Labels, Net Names, Power Flags & Annotation  @TechExplorations_
Uploaded June 2026 | Updated September 2026, 2 weeks ago
A schematic with errors produces a board that doesn't work. A schematic that can't be read produces layout mistakes and bring-up failures. This lecture covers the six practices that prevent both β€” and all six are active in the Smart USB Thumb Drive project from the first symbol placed.

Topics covered: hierarchical sheet organization, KiCad's three label types and when to use each, net naming conventions, power flags, annotation strategy, and title block discipline. These aren't abstract rules β€” each one connects directly to something that goes wrong in layout or manufacturing when it's ignored.

πŸŽ“ Course: KiCad Advanced β€” BGA, Signal Integrity, and High-Speed Layout Full enrollment and course details: connect.techexplorations.com/so/smart-usb-thumb-drive-with-kicad

This course takes you through the complete design of a Smart USB Thumb Drive β€” from schematic to manufactured PCB β€” using KiCad. You'll work with BGA packaging, USB differential pairs, eMMC length matching, and ideal diode power management on a real, orderable board.

In this video

The schematic design phase of the Smart USB Thumb Drive project, starting with the practices that keep a multi-sheet hierarchical design correct and legible. Covers the six conventions used throughout this project, with specific examples drawn from the actual design.

Timestamps

00:00 Why schematic quality matters β€” errors travel downstream into layout, BOM, and firmware
00:46 The schematic as the primary source of truth
01:52 Hierarchical sheets β€” simple, complex, and flat hierarchy in KiCad
03:30 KiCad's three label types β€” net label, global label, hierarchical label
05:07 Net naming conventions β€” power rails, USB pairs, eMMC bus, I2C, SWD
06:43 How net names enable automatic net class assignment in layout
07:00 Power flags β€” what they are, why the ERC needs them, and where they go in this design
08:36 Annotation β€” reference designator prefixes and the Γ—100 sheet-based numbering strategy
09:44 Two annotation warnings β€” when to freeze refs and why never to re-annotate after layout
10:15 Title blocks, revision fields, and schematic notes as engineering documentation
11:49 Summary β€” six practices active before the first PCB trace is drawn

Tech Explorations creates practical electronics and PCB design courses for engineers, makers, and educators. More courses at techexplorations.com.
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KiCad Schematic Best Practices β€” Hierarchy, Labels, Net Names, Power Flags & Annotation

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