Uploaded May 2026 | Updated September 2026, 2 weeks ago
Part one covered the physics of differential signaling and impedance. Part two covers what attacks that signal from the outside — and what you do about it in the schematic and layout.
This lecture covers common mode noise and the four layout decisions that break common mode rejection, ESD protection on USB data lines and the 5 pF capacitance budget that governs every device selection, the eye diagram as a pass/fail measurement tied directly to your layout choices, and the specific USB signal requirements for both paths in this design — the USB2244 high-speed bridge and the RP2040 full-speed controller.
🎓 Course: KiCad Advanced — BGA, Signal Integrity, and High-Speed Layout
Full enrollment and course details: connect.techexplorations.com/so/smart-usb-thumb-drive-with-kicad
This course takes you through the complete design of a Smart USB Thumb Drive — from schematic to manufactured PCB — using KiCad. You'll work with BGA packaging, USB differential pairs, eMMC length matching, and ideal diode power management on a real, orderable board.
In this video
Part two of a two-part series on USB 2.0 signal integrity. Part one built the physics foundation. This lecture applies it: common mode noise suppression, ESD device selection and placement, eye diagram compliance, and the component-level requirements for the USB2244 and RP2040 in the Smart USB Thumb Drive design.
Timestamps
00:00 Recap of Part 1 — differential signaling, 90Ω target, length matching
01:50 Common mode noise — sources, how the differential receiver cancels it, and why balance is essential
03:02 Four layout decisions that break common mode rejection — length mismatch, impedance asymmetry, split reference planes, asymmetric vias
04:19 Common mode chokes — how they work and why this design omits them
06:01 ESD protection — why every USB connector is a direct path for electrostatic discharge
07:14 TVS diodes — how they clamp, discrete vs array configurations, selection criteria
08:41 The 5 pF capacitance budget — why it's the hardest constraint on ESD device selection
09:22 The D3V3XA4B10LP — specs, capacitance margin, ESD rating, and why it was chosen
10:41 TVS placement rules — in-line routing, no stubs, low-inductance ground connection
12:15 Eye diagram revisited — eye height, eye width, jitter, and the USB-IF hexagonal mask
14:05 USB 2.0 high-speed eye diagram specification — 800 mV swing, 2.08 ns bit period
14:29 Compliance testing procedure — HSETT, test packet pattern, 45Ω SMA fixture
15:28 How layout decisions move the eye — ESD capacitance comparison at 0.35, 6, and 65 pF
16:57 Two USB-C connectors — which carries high speed storage, which carries full-speed RP2040
18:27 USB2244 — role, 24 MHz crystal requirement, 1 MΩ feedback resistor, EEPROM for USB identity
20:13 RP2040 USB pins — USB_DP, USB_DM, USB_VDD, mandatory 27Ω series resistors
21:24 Clarification — RP2040 is a full-speed PHY only; "USB 2.0 compliant" refers to protocol, not speed
22:10 Summary — 90Ω target, 5 pF path budget, 0.5 pF ESD limit, USB2244 vs RP2040 requirements
Tech Explorations creates practical electronics and PCB design courses for engineers, makers, and educators. More courses at techexplorations.com.
Part one covered the physics of differential signaling and impedance. Part two covers what attacks that signal from the outside — and what you do about it in the schematic and layout.
This lecture covers common mode noise and the four layout decisions that break common mode rejection, ESD protection on USB data lines and the 5 pF capacitance budget that governs every device selection, the eye diagram as a pass/fail measurement tied directly to your layout choices, and the specific USB signal requirements for both paths in this design — the USB2244 high-speed bridge and the RP2040 full-speed controller.
🎓 Course: KiCad Advanced — BGA, Signal Integrity, and High-Speed Layout
Full enrollment and course details: connect.techexplorations.com/so/smart-usb-thumb-drive-with-kicad
This course takes you through the complete design of a Smart USB Thumb Drive — from schematic to manufactured PCB — using KiCad. You'll work with BGA packaging, USB differential pairs, eMMC length matching, and ideal diode power management on a real, orderable board.
In this video
Part two of a two-part series on USB 2.0 signal integrity. Part one built the physics foundation. This lecture applies it: common mode noise suppression, ESD device selection and placement, eye diagram compliance, and the component-level requirements for the USB2244 and RP2040 in the Smart USB Thumb Drive design.
Timestamps
00:00 Recap of Part 1 — differential signaling, 90Ω target, length matching
01:50 Common mode noise — sources, how the differential receiver cancels it, and why balance is essential
03:02 Four layout decisions that break common mode rejection — length mismatch, impedance asymmetry, split reference planes, asymmetric vias
04:19 Common mode chokes — how they work and why this design omits them
06:01 ESD protection — why every USB connector is a direct path for electrostatic discharge
07:14 TVS diodes — how they clamp, discrete vs array configurations, selection criteria
08:41 The 5 pF capacitance budget — why it's the hardest constraint on ESD device selection
09:22 The D3V3XA4B10LP — specs, capacitance margin, ESD rating, and why it was chosen
10:41 TVS placement rules — in-line routing, no stubs, low-inductance ground connection
12:15 Eye diagram revisited — eye height, eye width, jitter, and the USB-IF hexagonal mask
14:05 USB 2.0 high-speed eye diagram specification — 800 mV swing, 2.08 ns bit period
14:29 Compliance testing procedure — HSETT, test packet pattern, 45Ω SMA fixture
15:28 How layout decisions move the eye — ESD capacitance comparison at 0.35, 6, and 65 pF
16:57 Two USB-C connectors — which carries high speed storage, which carries full-speed RP2040
18:27 USB2244 — role, 24 MHz crystal requirement, 1 MΩ feedback resistor, EEPROM for USB identity
20:13 RP2040 USB pins — USB_DP, USB_DM, USB_VDD, mandatory 27Ω series resistors
21:24 Clarification — RP2040 is a full-speed PHY only; "USB 2.0 compliant" refers to protocol, not speed
22:10 Summary — 90Ω target, 5 pF path budget, 0.5 pF ESD limit, USB2244 vs RP2040 requirements
Tech Explorations creates practical electronics and PCB design courses for engineers, makers, and educators. More courses at techexplorations.com.
![[065] Arduino Getting Started: Debugging with Serial.println](https://i.ytimg.com/vi/ylE6mi_V6iw/mqdefault.jpg "[065] Arduino Getting Started: Debugging with Serial.println
Explore the serial.print function, a crucial instruction for your Arduino sketches, is perfect for debugging and monitoring real-time data.
This video explains how to effectively use serial.print and serial.println for debugging and data display to help you develop Arduino code without bugs.
This series is possible thanks to the kind support of Sunfounder, an online store that sells high-quality hardware and kits for Makers. Visit Sunfounder at https://sunfounder.com.
In this series, I use the SunFounder 3 1 Ultimate Starter Kit with Original Arduino Uno R4 Minima, including high-quality sensors, actuators, power supplies, and Original Arduino Uno R4 Minima for diverse projects and skill-building. Get it (affiliate link): https://www.sunfounder.com/collections/arduino-kits/products/sunfounder-3-in-1-ultimate-starter-kit-with-original-arduino-uno-r4-minima?ref=bXS65iah
Timestamps:
[00:00 - 00:07] Introduction to the Serial.Print function
[00:07 - 00:18] Importance of Serial.Print in Arduino projects
[00:18 - 00:24] Overview of Serial communication
[00:24 - 00:35] Benefits of using Serial.Print for real-time data tracking
[00:35 - 00:44] Debugging with Serial.Print
[00:44 - 01:10] Setting up Serial communication in Arduino
[01:10 - 01:30] Using Serial.Print to display sensor data
[01:30 - 01:49] Serial.Print as a debugging tool
[01:49 - 02:12] Tips for effective debugging with Serial.Print
[02:12 - 02:23] Closing remarks and invitation to subscribe")
