Uploaded April 2024 | Updated September 2026, 1 week ago
This is the second half of the Hardware SPI video that would have been far too long. As such the beginning jumps strait into implementation, I usually try and start in a less sudden way.
In this video I add hardware support for the remaining two lines MOSI and the Clock and unlock sustained transfer speeds at the full clock rate of the cpu, 8 megabits per seconds!
I made a couple of tweaks to this circuit after main recording, these are both minor things in my original plan but there was a little more troubleshooting than I had expected and I passed these over in the main build. I added them here: youtu.be/pUjDu1qXBw0
0:00 Introduction
0:46 Discussion
1:12 CPU support
5:35 MOSI
16:25 Clock Generation
25:05 Mode 0 Test
27:03 Multi Byte Read
30:17 Outro
This is the second half of the Hardware SPI video that would have been far too long. As such the beginning jumps strait into implementation, I usually try and start in a less sudden way.
In this video I add hardware support for the remaining two lines MOSI and the Clock and unlock sustained transfer speeds at the full clock rate of the cpu, 8 megabits per seconds!
I made a couple of tweaks to this circuit after main recording, these are both minor things in my original plan but there was a little more troubleshooting than I had expected and I passed these over in the main build. I added them here: youtu.be/pUjDu1qXBw0
0:00 Introduction
0:46 Discussion
1:12 CPU support
5:35 MOSI
16:25 Clock Generation
25:05 Mode 0 Test
27:03 Multi Byte Read
30:17 Outro
