Uploaded April 2019 | Updated September 2026, 1 week ago
There are 3 flags in the ALU, in this video I pull them all together and add LED indicators. The zero flag is built by constructing an 8 input NOR gate from 2x5 input NOR gates (The 74LS260) and then merging the outputs with one of the gates from a 74LS21 2x4 input AND chip. This really should have been done with a 2 input AND gate but that one is what I had to hand.
Flag states (for arithmetic carry and logical carry) are held in the usual 74LS574 D-Type latch chip. There is no use of the flags outside of the ALU yet but eventually they will be connected back to the pipeline for conditional jumps etc.
There are 3 flags in the ALU, in this video I pull them all together and add LED indicators. The zero flag is built by constructing an 8 input NOR gate from 2x5 input NOR gates (The 74LS260) and then merging the outputs with one of the gates from a 74LS21 2x4 input AND chip. This really should have been done with a 2 input AND gate but that one is what I had to hand.
Flag states (for arithmetic carry and logical carry) are held in the usual 74LS574 D-Type latch chip. There is no use of the flags outside of the ALU yet but eventually they will be connected back to the pipeline for conditional jumps etc.
