Uploaded November 2025 | Updated September 2026, 1 week ago
Efficient RISC-V Processor Customization: Minimizing Verification Efforts - Zdeněk Přikryl, Codasip
Heterogeneous computing is a key enabler for addressing the increasing complexity and diversity of modern workloads. The fundamental components of such systems include processors and accelerators, both designed to handle workloads efficiently. RISC-V, with its openness and extensibility, is ideally suited for this role, serving as a processor or an accelerator for applications such as AI or DSP. Customizing a processor involves several critical steps, including defining new instructions, implementing them, and, importantly, verifying these new instructions and re-verifying the entire processor. The Bounded Customization methodology eliminates the need for comprehensive processor re-verification, focusing solely on verifying new instructions and thereby significantly simplifying the customization process. This methodology is built upon three core concepts: defining bounds, designing processors with these bounds in mind, and utilizing EDA tools to manage the bounds and assist users in customization. There are other benefits, such as the removal of the deep processor knowledge. This presentation details the methodology and bounds and demonstrates its application through use cases.
Efficient RISC-V Processor Customization: Minimizing Verification Efforts - Zdeněk Přikryl, Codasip
Heterogeneous computing is a key enabler for addressing the increasing complexity and diversity of modern workloads. The fundamental components of such systems include processors and accelerators, both designed to handle workloads efficiently. RISC-V, with its openness and extensibility, is ideally suited for this role, serving as a processor or an accelerator for applications such as AI or DSP. Customizing a processor involves several critical steps, including defining new instructions, implementing them, and, importantly, verifying these new instructions and re-verifying the entire processor. The Bounded Customization methodology eliminates the need for comprehensive processor re-verification, focusing solely on verifying new instructions and thereby significantly simplifying the customization process. This methodology is built upon three core concepts: defining bounds, designing processors with these bounds in mind, and utilizing EDA tools to manage the bounds and assist users in customization. There are other benefits, such as the removal of the deep processor knowledge. This presentation details the methodology and bounds and demonstrates its application through use cases.
