Uploaded May 2026 | Updated September 2026, 3 weeks ago
The TinyTapeout FabricFox breakout brings an FPGA onto a board pin-compatible with the TinyTapeout demoboard, enabling designers to validate their synthesized implementation on real hardware before committing to silicon.
This talk covers how the breakout slots into the open-source ASIC design flow: local or github-action based hardening, a unified microPython SDK for project selection and hardware control, and custom Python or microcotb for hardware-in-the-loop testbenches that mirror simulation. The same demoboard hosts both FPGA prototype and final ASIC--making physical validation a first-class step in the loop, not an afterthought.
The result is a tight, open-source loop from simulation → FPGA → silicon that dramatically accelerates iteration while keeping every step reproducible and accessible to the FOSSi community. Come see how this tiny board closes the gap between prototype and tapeout.
The TinyTapeout FabricFox breakout brings an FPGA onto a board pin-compatible with the TinyTapeout demoboard, enabling designers to validate their synthesized implementation on real hardware before committing to silicon.
This talk covers how the breakout slots into the open-source ASIC design flow: local or github-action based hardening, a unified microPython SDK for project selection and hardware control, and custom Python or microcotb for hardware-in-the-loop testbenches that mirror simulation. The same demoboard hosts both FPGA prototype and final ASIC--making physical validation a first-class step in the loop, not an afterthought.
The result is a tight, open-source loop from simulation → FPGA → silicon that dramatically accelerates iteration while keeping every step reproducible and accessible to the FOSSi community. Come see how this tiny board closes the gap between prototype and tapeout.
