![MPU 7 Insertion Sort [ 2 Hz Minecraft Redstone CPU ] @ModPunchtree](https://i.ytimg.com/vi/j2AYIA4qBdg/maxresdefault.jpg)
Uploaded February 2022 | Updated September 2026, 2 weeks ago
The MPU 7 is my latest and fastest Minecraft redstone CPU.
In this video the MPU 7 sorts a reversed array of 10 numbers using insertion sort.
Insertion sort is a simple type of sorting algorithm which requires a lot of reading an writing to the RAM. Since the RAM read speed is quite slow on the MPU 7, this algorithm runs quite slowly as the CPU spends a lot of time stalling for RAM reads.
This video is at 1x speed and does not use any tick speed up from carpet mod. So the speed shown here includes a small amount of lag but should be close to 20 ticks per second.
The screen delay and RAM delay is especially noticeable at the beginning and end of the video when it prints out the array of 10 numbers to the screen which takes a long time.
On paper (i.e. without lag) it takes:
• roughly 67 cycles to print the initial list (1 min 7 secs)
• roughly 456 cycles to perform the insertion sort (3 mins 48 seconds)
• roughly 67 cycles to print the final list (1 min 7 secs)
Note that these timings do not account for the time before the program counter starts changing or the time after the program counter stops changing or the bussing delay between the displays and the control logic inside the CPU.
Join the URCL (Universal Reduced Computer Language) discord:
discord.gg/Nv8jzWg5j8
MPU 7 Specs:
• No command blocks or pistons
• 2 Hz clock speed (5 ticks or 0.5 seconds per clock pulse)
• 5 stage waterfall pipeline (Fetch1 - Fetch2 - Decode - Execute - Writeback)
• 10 general purpose simulated dual read registers (with no read before write hazards because of the automatic forwarding)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 8 bit RNG
• 64x32 pixel display (1x1 pixels) which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 256 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data
• 7 testable flags
• Full 7 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 7 ISA:
docs.google.com/spreadsheets/d/1fgXPalCBTGg-X3QGXmNagxAMHoiOW_9nbOgaJl7fFoY/edit?usp=sharing
MPU 7 World download is available in the URCL discord:
discord.gg/Nv8jzWg5j8
If you want to support me creating these videos, my PayPal link is: paypal.me/modpunchtree
The MPU 7 is my latest and fastest Minecraft redstone CPU.
In this video the MPU 7 sorts a reversed array of 10 numbers using insertion sort.
Insertion sort is a simple type of sorting algorithm which requires a lot of reading an writing to the RAM. Since the RAM read speed is quite slow on the MPU 7, this algorithm runs quite slowly as the CPU spends a lot of time stalling for RAM reads.
This video is at 1x speed and does not use any tick speed up from carpet mod. So the speed shown here includes a small amount of lag but should be close to 20 ticks per second.
The screen delay and RAM delay is especially noticeable at the beginning and end of the video when it prints out the array of 10 numbers to the screen which takes a long time.
On paper (i.e. without lag) it takes:
• roughly 67 cycles to print the initial list (1 min 7 secs)
• roughly 456 cycles to perform the insertion sort (3 mins 48 seconds)
• roughly 67 cycles to print the final list (1 min 7 secs)
Note that these timings do not account for the time before the program counter starts changing or the time after the program counter stops changing or the bussing delay between the displays and the control logic inside the CPU.
Join the URCL (Universal Reduced Computer Language) discord:
discord.gg/Nv8jzWg5j8
MPU 7 Specs:
• No command blocks or pistons
• 2 Hz clock speed (5 ticks or 0.5 seconds per clock pulse)
• 5 stage waterfall pipeline (Fetch1 - Fetch2 - Decode - Execute - Writeback)
• 10 general purpose simulated dual read registers (with no read before write hazards because of the automatic forwarding)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 8 bit RNG
• 64x32 pixel display (1x1 pixels) which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 256 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data
• 7 testable flags
• Full 7 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 7 ISA:
docs.google.com/spreadsheets/d/1fgXPalCBTGg-X3QGXmNagxAMHoiOW_9nbOgaJl7fFoY/edit?usp=sharing
MPU 7 World download is available in the URCL discord:
discord.gg/Nv8jzWg5j8
If you want to support me creating these videos, my PayPal link is: paypal.me/modpunchtree
![MPU 7 Insertion Sort [ 2 Hz Minecraft Redstone CPU ]](https://i.ytimg.com/vi/j2AYIA4qBdg/mqdefault.jpg "MPU 7 Insertion Sort [ 2 Hz Minecraft Redstone CPU ]
The MPU 7 is my latest and fastest Minecraft redstone CPU.
In this video the MPU 7 sorts a reversed array of 10 numbers using insertion sort.
Insertion sort is a simple type of sorting algorithm which requires a lot of reading an writing to the RAM. Since the RAM read speed is quite slow on the MPU 7, this algorithm runs quite slowly as the CPU spends a lot of time stalling for RAM reads.
This video is at 1x speed and does not use any tick speed up from carpet mod. So the speed shown here includes a small amount of lag but should be close to 20 ticks per second.
The screen delay and RAM delay is especially noticeable at the beginning and end of the video when it prints out the array of 10 numbers to the screen which takes a long time.
On paper (i.e. without lag) it takes:
• roughly 67 cycles to print the initial list (1 min 7 secs)
• roughly 456 cycles to perform the insertion sort (3 mins 48 seconds)
• roughly 67 cycles to print the final list (1 min 7 secs)
Note that these timings do not account for the time before the program counter starts changing or the time after the program counter stops changing or the bussing delay between the displays and the control logic inside the CPU.
Join the URCL (Universal Reduced Computer Language) discord:
https://discord.gg/Nv8jzWg5j8
MPU 7 Specs:
• No command blocks or pistons
• 2 Hz clock speed (5 ticks or 0.5 seconds per clock pulse)
• 5 stage waterfall pipeline (Fetch1 - Fetch2 - Decode - Execute - Writeback)
• 10 general purpose simulated dual read registers (with no read before write hazards because of the automatic forwarding)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 8 bit RNG
• 64x32 pixel display (1x1 pixels) which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 256 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data
• 7 testable flags
• Full 7 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 7 ISA:
https://docs.google.com/spreadsheets/d/1fgXPalCBTGg-X3QGXmNagxAMHoiOW_9nbOgaJl7fFoY/edit?usp=sharing
MPU 7 World download is available in the URCL discord:
https://discord.gg/Nv8jzWg5j8
If you want to support me creating these videos, my PayPal link is: https://paypal.me/modpunchtree")
![3D Rotating Pyramid [ MPU 8 | 3.3 Hz Minecraft Redstone CPU ]](https://i.ytimg.com/vi/kXYh_NLgy6o/mqdefault.jpg "3D Rotating Pyramid [ MPU 8 | 3.3 Hz Minecraft Redstone CPU ]
The MPU 8 is my latest and fastest Minecraft Redstone CPU.
Here the MPU 8 is rendering a 3D square based pyramid and rotating it.
This is using the exact same 3d renderer program as the one used for the 3D rotating cube. I have made this to show that it can render any small 3D shape fairly easily.
The matrix multiplications for calculating the rotation and rasterisation of the cube are all being calculated each frame by the CPU.
This is NOT a video and it does NOT use precalculated points - the positions of the points are ALL calculated on the CPU.
For trigonometry i simplified it a lot by assuming that Sin(x) = x and Cos(x) = 1 where x is a small angle, this gives an approximation that is good enough for a couple minutes.
In this program the pyramid becomes more distorted as time progresses due to the rounding errors building up from the division operations as well as the trigonometry assumption.
(this is why the pyramid looks quite twisted and stretched towards the end)
This video been sped up 8x and the tick speed has been set to 800 times speed (so a total speed up of 6400x).
Join the URCL (Universal Reduced Computer Language) discord:
https://discord.gg/Nv8jzWg5j8
MPU 8 Specs:
• No command blocks or pistons
• 3.3 Hz clock speed (3 ticks or 0.3 seconds per clock pulse)
• 9 stage waterfall pipeline
• 12 general purpose simulated dual read registers (with automatic forwarding at 6 ticks)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 64x64 pixel display which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 512 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data
• 13 testable flags
• 8 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 8 ISA:
https://docs.google.com/spreadsheets/d/1KRoZNu5ic36-vcP-6llN8L27ZvLxW5ILiaOX5gcoAC4/edit?usp=sharing
If you want to support me creating these videos, my Patreon is:
https://www.patreon.com/modpunchtree
or my PayPal link is:
https://paypal.me/modpunchtree")
![MPU 8 BCD Fibonacci [ 3.3 Hz Minecraft Redstone CPU ]](https://i.ytimg.com/vi/kfDJQwEhs6Q/mqdefault.jpg "MPU 8 BCD Fibonacci [ 3.3 Hz Minecraft Redstone CPU ]
The MPU 8 is my latest and fastest Minecraft Redstone CPU.
Here the MPU 8 is running a simple 8 bit Fibonacci program and for each value - it converts them to base 10 and prints them to the screen. When it the value overflows 8 bits - the program stops.
This video has been sped up 4 times and the tick speed has not been changed.
Join the URCL (Universal Reduced Computer Language) discord:
https://discord.gg/Nv8jzWg5j8
MPU 8 Specs:
• No command blocks or pistons
• 3.3 Hz clock speed (3 ticks or 0.3 seconds per clock pulse)
• 9 stage waterfall pipeline
• 12 general purpose simulated dual read registers (with automatic forwarding at 6 ticks)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 64x64 pixel display which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 512 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data
• 13 testable flags
• 8 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 8 ISA:
https://docs.google.com/spreadsheets/d/1KRoZNu5ic36-vcP-6llN8L27ZvLxW5ILiaOX5gcoAC4/edit?usp=sharing
If you want to support me creating these videos, my Patreon is:
https://www.patreon.com/modpunchtree
or my PayPal link is:
https://paypal.me/modpunchtree")
![The making of the most POWERFUL 16 bit Minecraft computer. [IRIS Documentary]](https://i.ytimg.com/vi/lcdZg3ylYGY/mqdefault.jpg "The making of the most POWERFUL 16 bit Minecraft computer. [IRIS Documentary]
1 hour of edited and commentated video
hopefully the editing feeds your tiktok brain enough that you watch it!
IRIS is a fully programmable 16 bit computer built in Minecraft by me - ModPunchtree.
IRIS only uses redstone and does NOT use any command blocks or datapacks.
IRIS is fully functional in vanilla Minecraft.
IRIS is capable of running even more games and programs than shown here!
Subscribe for future videos of IRIS running even more cool stuff!
Note:
The colour screen uses retextured redstone dust which displays 16 different colours controlled by changing the signal strength.
This video took 6 months to make because I kept procrastinating by working on pointless things - like making my own vtuber model.
Editing the video was not fun which is why procrastinated on it.
So for future videos I will do less editing.
0:00 Intro
0:56 My previous computer (MPU8)
1:28 MCHPRS and sammyuri
3:58 MCHPRS vs vanilla
6:10 Design goals of IRIS
11:10 Abstract diagram of IRIS
18:32 Physical parts of IRIS
33:25 Timings diagram of IRIS
34:57 16 bit floats
40:50 ISA (Instruction Set Architecture)
45:26 Assembly code
49:04 URCL (Universal Reduced Computer Language)
49:50 Online Emulator
50:23 Assembler
52:41 Run minecraft yourself
53:35 Patreon
54:18 End
IRIS Specs:
- 16 bit
- Custom RISC arch
- 32 bits per instruction
- Up to 2048 instructions (Harvard architecture)
- 29 general purpose registers
- 8 kB RAM
- 64 kB ROM
- 4 kB tile ROM
- 128x96 pixel black and white screen
- Floating point unit (add, mult, divide, sqrt)
- Qwerty keyboard
- 173 tick clock (runs at roughly 20 kHz on mchprs)
IRIS diagram:
https://files.catbox.moe/oz1ang.png
IRIS ISA sheet:
https://docs.google.com/spreadsheets/d/1lNaA6qRkyq3S7KwoEd5H7LZ2mnZaqGI-8hp3zQbeJTc/edit?usp=sharing
World Download:
https://drive.google.com/file/d/1ty4R3TPPf4gbtWCKj2QRdHJr5MXafZWi/view?usp=sharing
Run the minecraft program or write your own programs using the online emulator:
https://bramotte.github.io/irix-super-secret/
Minecraft in Minecraft Program written in URCL:
https://pastebin.com/xe7uKGBZ
Join my Patreon to get:
- Working version of IRIS
- All IRIS tools
- Code for all programs IRIS has ran
- Access to Discord channels where I discuss IRIS
- Support me pushing the limits of redstone!
https://www.patreon.com/modpunchtree
Alternatively become a channel member to get the same perks:
https://www.youtube.com/channel/UCEgmpeSCRvIhS4FX8C_Fgyg/join
Join my Discord:
https://discord.gg/GRdTe4myPZ
URCL Discord: (URCL is the programming language all IRIS programs were written in)
https://discord.gg/Nv8jzWg5j8
MCHPRS Github: (Minecraft server that runs redstone really fast)
https://github.com/MCHPR/MCHPRS
Credits:
ModPunchtree - built IRIS and wrote most of the programs
Verlio - wrote the raytracer program seen in the intro
sammyuri - created chungus2
StackDoubleFlow - created MCHPRS
Sloimay - created the carry save adder and the world edit schematic generator
Kuggo - improved the hardware divider
Bram - created the IRIS emulator and improved MCHPRS
Music:
Pokémon Ruby - Wild Pokémon Battle
AphidAks - E1M1 in Noteblocks
Mario Kart Super Circuit - Sky Garden
Sonic Battle - Title Screen
Mario Kart Super Circuit - Battle Course
MEGABONK - Wednesday morning Bonk its 9am
Mario Kart Super Circuit - Circuit Course
Renard - Intensive Care Unit
Mario Kart Super Circuit - Bowser Castle
Wii Sports - Title Screen
Yoshis Island - Athletic
Advance Wars Reboot Camp - Adders COP
Kitsune^2 - Rainbow Tylenol
FTL - MilkyWay
Miku Hatsune - PO PI PO
Silver Surfer - Level 1
Pokémon TCG GBC - Normal Battle
Mega Man 2 - Wily Fortress 1
Super Mario 64 - File Select
Kirbys Adventure - Green Greens
Mittsies - Titanium
Kitsune^2 - Rock My Emotions
Mittsies - Vitality
Advance Wars Reboot Camp - Sturms Theme
Gojimaji-P - Mischievous Function
Donkey Kong Country 2 - Stickerbush Symphony
Terraria Calamity Mod - Crabulon Theme
Dont Starve - Main Menu
IMOJIST - 2024 Memes Wangan Trance Remix
Pokémon Ruby - Victory!
I do NOT own the music!")
![MPU 7 Recursive Fibonacci (B code) [ 2 Hz Minecraft Redstone CPU ]](https://i.ytimg.com/vi/m3RHOeF2HDM/mqdefault.jpg "MPU 7 Recursive Fibonacci (B code) [ 2 Hz Minecraft Redstone CPU ]
The MPU 7 is my latest and fastest Minecraft Redstone CPU.
Here the MPU 7 is running recursive Fibonacci written in B code that has been compiled to URCL code using the B compiler I wrote.
This program does not use memorisation and it took approximately 1.5 hours to calculate all the way up to fib(8).
B code for recursive Fibonacci:
auto fib(auto x) {
if (x ＜ 2) {
return x;
}
return fib(x - 1) + fib(x - 2);
}
auto x = -1;
while (1) {
x += 1;
asm {
OUT %TEXT n;
OUT %TEXT f;
OUT %TEXT i;
OUT %TEXT b;
OUT %TEXT (;
OUT %TEXT x;
OUT %TEXT );
}
auto answer = fib(x);
asm {
OUT %NUMB answer;
}
}
Anyone who wants to run code on the MPU 7 can feel free to send me URCL programs (or B code!) and I can attempt to run them.
The MPU 7 is capable of doing up to fib(13) = 233 but it would take several days to run.
To run URCL code, I translate the URCL code line by line into MPU 7 assembly using a dictionary of translations in a Python program I wrote. Then I write the translated MPU 7 assembly into the instruction ROM and run it.
It really is that simple. (Which is the whole point of URCL)
Join the URCL (Universal Reduced Computer Language) discord:
https://discord.gg/Nv8jzWg5j8
This video is at 128x speed and the carpet mod tick speed is set to 2 times speed.
The flashing horizontal line is the cursor. This just shows what area of the screen the MPU 7 is currently writing to.
MPU 7 Specs:
• No command blocks or pistons
• 2 Hz clock speed (5 ticks or 0.5 seconds per clock pulse)
• 5 stage waterfall pipeline (Fetch1 - Fetch2 - Decode - Execute - Writeback)
• 10 general purpose simulated dual read registers (with no read before write hazards because of the automatic forwarding)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 8 bit RNG
• 64x32 pixel display (1x1 pixels) which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 256 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data (Like Bad Apple!!)
• 7 testable flags
• Full 7 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 7 ISA:
https://docs.google.com/spreadsheets/d/1fgXPalCBTGg-X3QGXmNagxAMHoiOW_9nbOgaJl7fFoY/edit?usp=sharing
MPU 7 World download is available in the URCL discord:
https://discord.gg/Nv8jzWg5j8
If you want to support me creating these videos, Patreon is:
https://www.patreon.com/modpunchtree
or my PayPal link is:
https://paypal.me/modpunchtree")
