MPU4.0 8 bit Fibonacci @ModPunchtree

Uploaded July 2020 | Updated September 2026, 2 weeks ago

Basic 8 bit Fibonacci on the MPU4.0

$MPU 7 Recursive Fibonacci (B code) [ 2 Hz Minecraft Redstone CPU ] The MPU 7 is my latest and fastest Minecraft Redstone CPU. Here the MPU 7 is running recursive Fibonacci written in B code that has been compiled to URCL code using the B compiler I wrote. This program does not use memorisation and it took approximately 1.5 hours to calculate all the way up to fib(8). B code for recursive Fibonacci: auto fib(auto x) { if (x ＜ 2) { return x; } return fib(x - 1) + fib(x - 2); } auto x = -1; while (1) { x += 1; asm { OUT %TEXT n; OUT %TEXT f; OUT %TEXT i; OUT %TEXT b; OUT %TEXT (; OUT %TEXT x; OUT %TEXT ); } auto answer = fib(x); asm { OUT %NUMB answer; } } Anyone who wants to run code on the MPU 7 can feel free to send me URCL programs (or B code!) and I can attempt to run them. The MPU 7 is capable of doing up to fib(13) = 233 but it would take several days to run. To run URCL code, I translate the URCL code line by line into MPU 7 assembly using a dictionary of translations in a Python program I wrote. Then I write the translated MPU 7 assembly into the instruction ROM and run it. It really is that simple. (Which is the whole point of URCL) Join the URCL (Universal Reduced Computer Language) discord: https://discord.gg/Nv8jzWg5j8 This video is at 128x speed and the carpet mod tick speed is set to 2 times speed. The flashing horizontal line is the cursor. This just shows what area of the screen the MPU 7 is currently writing to. MPU 7 Specs: • No command blocks or pistons • 2 Hz clock speed (5 ticks or 0.5 seconds per clock pulse) • 5 stage waterfall pipeline (Fetch1 - Fetch2 - Decode - Execute - Writeback) • 10 general purpose simulated dual read registers (with no read before write hazards because of the automatic forwarding) • 8 bit word length • 256 word instruction ROM x2 • 32 bit instruction length (that includes an 8 bit immediate value) • VLIW architecture • 32 bit hardware BCD converter • 8 bit hardware multiplier • 8 bit hardware divider • 8 bit RNG • 64x32 pixel display (1x1 pixels) which can be shifted upwards 8 pixels whenever needed • 1 frame buffer • Full qwerty keyboard with arrow keys and function keys for user input • 128 bytes of main RAM • 256 bytes of screen RAM • Up to 128 I/O ports • External 8 kiB paging ROM for storing large amounts of data (Like Bad Apple!!) • 7 testable flags • Full 7 bit character set (a custom one, so not ASCII) which uses 4x8 characters • Can be started, stopped and reset from the UI • Almost fully compatible with URCL MPU 7 ISA: https://docs.google.com/spreadsheets/d/1fgXPalCBTGg-X3QGXmNagxAMHoiOW_9nbOgaJl7fFoY/edit?usp=sharing MPU 7 World download is available in the URCL discord: https://discord.gg/Nv8jzWg5j8 If you want to support me creating these videos, Patreon is: https://www.patreon.com/modpunchtree or my PayPal link is: https://paypal.me/modpunchtree$

RICKROLL on REDSTONE COMPUTER in MINECRAFT + World Download

MPU 7 - 32 bit Fibonacci [ 2 Hz Minecraft Redstone CPU ]

$MPU 8 Mandelbrot [ 3.3 Hz Minecraft Redstone CPU ] The MPU 8 is my latest and fastest Minecraft Redstone CPU. Here the MPU 8 is generating the mandelbrot fractal at 64x64 pixel resolution with 20 iterations per pixel. For the calculations I used 2.6 fixed point numbers and a look-up table in the RAM which stored the initial values for each coordinate. This video has been sped up 8 times and the tick speed has been set to 1400 times speed. (so a net speed up of 11200 times) This program took 2375726 cycles to run (198 hours at default Minecraft speed). Join the URCL (Universal Reduced Computer Language) discord: https://discord.gg/Nv8jzWg5j8 MPU 8 Specs: • No command blocks or pistons • 3.3 Hz clock speed (3 ticks or 0.3 seconds per clock pulse) • 9 stage waterfall pipeline • 12 general purpose simulated dual read registers (with automatic forwarding at 6 ticks) • 8 bit word length • 256 word instruction ROM x2 • 32 bit instruction length (that includes an 8 bit immediate value) • VLIW architecture • 32 bit hardware BCD converter • 8 bit hardware multiplier • 8 bit hardware divider • 64x64 pixel display which can be shifted upwards 8 pixels whenever needed • 1 frame buffer • Full qwerty keyboard with arrow keys and function keys for user input • 128 bytes of main RAM • 512 bytes of screen RAM • Up to 128 I/O ports • External 8 kiB paging ROM for storing large amounts of data • 13 testable flags • 8 bit character set (a custom one, so not ASCII) which uses 4x8 characters • Can be started, stopped and reset from the UI • Almost fully compatible with URCL MPU 8 ISA: https://docs.google.com/spreadsheets/d/1KRoZNu5ic36-vcP-6llN8L27ZvLxW5ILiaOX5gcoAC4/edit?usp=sharing If you want to support me creating these videos, my Patreon is: https://www.patreon.com/modpunchtree or my PayPal link is: https://paypal.me/modpunchtree$

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