Uploaded March 2017 | Updated September 2026, 3 weeks ago

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Session 4, Hot Chips 28 (2016), Monday, August 22, 2016.

From Model to FPGA: Software-Hardware Co-Design for Efficient Neural Network Acceleration
Song Yao, Deephi and Tsinghua University

The path to Embedded Vision and AI using a low power Vision DSP
Yair Siegel, CEVA

High Performance DSP for Vision, Imaging and Neural Networks
Greg Efland, Cadence