Uploaded February 2016 | Updated September 2026, 3 weeks ago
Session 4, Hot Chips 27 (2015), Tuesday, August 25, 2015.
Xilinx 16nm UltraScale+ MPSoC and FPGA families
Sagheer Ahmad, Vamsi Boppana, Ralph Wittig and Vidya Rajagopalan, Xilinx
Stratix 10 Altera’s 14nm FPGA Targeting 1GHz Performance
Mike Hutton, Altera
Toward Accelerating Deep Learning at Scale Using Specialized Logic
Kalin Ovtcharov, Olatunji Ruwase, Joo-Young Kim, Jeremy Fowers, Karin Strauss and Eric Chung, Microsoft Research
Session 4, Hot Chips 27 (2015), Tuesday, August 25, 2015.
Xilinx 16nm UltraScale+ MPSoC and FPGA families
Sagheer Ahmad, Vamsi Boppana, Ralph Wittig and Vidya Rajagopalan, Xilinx
Stratix 10 Altera’s 14nm FPGA Targeting 1GHz Performance
Mike Hutton, Altera
Toward Accelerating Deep Learning at Scale Using Specialized Logic
Kalin Ovtcharov, Olatunji Ruwase, Joo-Young Kim, Jeremy Fowers, Karin Strauss and Eric Chung, Microsoft Research










