Create the Chip YOU Want: Fast, Tailored ASIC Design with Efabless IP Blocks & Verified Modules @efabless_channel
Create the Chip YOU Want: Fast, Tailored ASIC Design with Efabless IP Blocks & Verified Modules  @efabless_channel
Uploaded May 2024 | Updated September 2026, 3 hours ago
Check out the recording of our recent webinar where we explore how the Efabless Marketplace can accelerate your journey to crafting a custom chip.

Discover how to create your ASIC quickly and affordably with our verified silicon IP blocks and soft modules, whether you're a seasoned designer or a newcomer.

Learn about leveraging our expansive array of pre-designed solutions, mixing and matching designs, and utilizing our innovative chipIgnite program to reduce costs and development time. Unlock the potential of high integration and customization with Efabless!

Note: The naming for the SRAM IP show in the webinar has been update. The following article walks through steps shown in this video with the corrected naming for the SRAM IP.

info.efabless.com/knowledge-base/how-to-use-efabless-sram
Create the Chip YOU Want: Fast, Tailored ASIC Design with Efabless IP Blocks & Verified Modules6. Lay out of a 21-stage ring oscillatorIm Alivewebinar AI 6Open Source IC Design Stack by efabless3. Layout of an inverter (DRC, ERC, LVS [NCC])4. Adding separate connections for power and ground10-1 Quick guide to laying out a long-L device without LVS error by creating an iconMPW-2 Silicon Testingefabless community engineering designerFull Chip STA with CaravelNEC Presentation at ChipEx2020
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Create the Chip YOU Want: Fast, Tailored ASIC Design with Efabless IP Blocks & Verified Modules

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