Uploaded August 2023 | Updated September 2026, 2 hours ago

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This tutorial demonstrates running a full hierarchical Static Timing Analysis (STA) on Caravel with our design integrated in it.

Timing Closure for Open-Source Designs
docs.google.com/document/d/e/2PACX-1vQOpQflufVN2KUF4gdeMognWhHKxHlIC4MdHF178ub2vN_wNxyjy2qOGsNMwF9U2bSE3Wtf8z2x5bQK/pub

efabless.com/getting-started

tutorial, how-to, open source, ASIC, tapeout, Efabless, chipIgnite, sky130