Uploaded April 2021 | Updated September 2026, 2 weeks ago
I can tolerate Fibonacci, maybe even a little Collatz, but Bresenham is where I draw the line.
This program was first written in B code which was compiled to MPU6 assembly using URCL as an intermediate language.
It can take any 2 coordinates and draw a line between them, regardless of the steepness of the line or the direction or if the points are given in the reverse order.
The program manipulates the points to be what it needs before drawing the line.
The points shown in the video were chosen because they are the worst possible points which require the most manipulation before the line can be drawn (steep gradient + negative slope + points in reverse order).
MPU6.0 Specs:
5 tick clock speed (0.5 seconds)
4 stage pipe (with dual instruction fetching to speed up conditional instructions)
8 bit word length
uses a custom version of VLIW arch
10 general purpose registers
32 bytes of RAM
128 word instruction ROM (split into 2 lots of 64 for dual fetching)
8 bit hardware multiplier
32 bit BCD converter
16x8 Pixel Display
Join the URCL (Universal Redstone Computer Language) discord:
discord.gg/Nv8jzWg5j8
I can tolerate Fibonacci, maybe even a little Collatz, but Bresenham is where I draw the line.
This program was first written in B code which was compiled to MPU6 assembly using URCL as an intermediate language.
It can take any 2 coordinates and draw a line between them, regardless of the steepness of the line or the direction or if the points are given in the reverse order.
The program manipulates the points to be what it needs before drawing the line.
The points shown in the video were chosen because they are the worst possible points which require the most manipulation before the line can be drawn (steep gradient + negative slope + points in reverse order).
MPU6.0 Specs:
5 tick clock speed (0.5 seconds)
4 stage pipe (with dual instruction fetching to speed up conditional instructions)
8 bit word length
uses a custom version of VLIW arch
10 general purpose registers
32 bytes of RAM
128 word instruction ROM (split into 2 lots of 64 for dual fetching)
8 bit hardware multiplier
32 bit BCD converter
16x8 Pixel Display
Join the URCL (Universal Redstone Computer Language) discord:
discord.gg/Nv8jzWg5j8
![MPU 7 URCL Fibonacci [ 2 Hz Minecraft Redstone CPU ]](https://i.ytimg.com/vi/rF4eLpQtxmk/mqdefault.jpg "MPU 7 URCL Fibonacci [ 2 Hz Minecraft Redstone CPU ]
The MPU 7 is my latest and fastest Minecraft Redstone CPU.
Here the MPU 7 is running URCL code for the first time.
I took the exact same URCL Fibonacci program that I wrote for the MPU 6 and ran it on the MPU 7 and it surprisingly worked first time without any issues.
To run URCL code, I translate the URCL code line by line into MPU 7 assembly using a dictionary of translations in a Python program I wrote. Then I write the translated MPU 7 assembly into the instruction ROM and run it.
It really is that simple. (Which is the whole point of URCL)
Join the URCL (Universal Reduced Computer Language) discord:
https://discord.gg/Nv8jzWg5j8
This video is at 4x speed and the carpet mod tick speed is set to 2 times speed.
The flashing horizontal line is the cursor. This just shows what area of the screen the MPU 7 is currently writing to.
MPU 7 Specs:
• No command blocks or pistons
• 2 Hz clock speed (5 ticks or 0.5 seconds per clock pulse)
• 5 stage waterfall pipeline (Fetch1 - Fetch2 - Decode - Execute - Writeback)
• 10 general purpose simulated dual read registers (with no read before write hazards because of the automatic forwarding)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 8 bit RNG
• 64x32 pixel display (1x1 pixels) which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 256 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data (Like Bad Apple!!)
• 7 testable flags
• Full 7 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 7 ISA:
https://docs.google.com/spreadsheets/d/1fgXPalCBTGg-X3QGXmNagxAMHoiOW_9nbOgaJl7fFoY/edit?usp=sharing
MPU 7 World download is available in the URCL discord:
https://discord.gg/Nv8jzWg5j8
If you want to support me creating these videos, Patreon is:
https://www.patreon.com/modpunchtree
or my PayPal link is:
https://paypal.me/modpunchtree")
![Gradient Line Drawer [ MPU 8 | 3.3 Hz Minecraft Redstone CPU ]](https://i.ytimg.com/vi/s4ahnw786N4/mqdefault.jpg "Gradient Line Drawer [ MPU 8 | 3.3 Hz Minecraft Redstone CPU ]
The MPU 8 is my latest and fastest Minecraft Redstone CPU.
Here the MPU 8 is drawing a star using the gradient line drawing algorithm.
The algorithm first calculates the gradient of the line it wants to draw by dividing the change in y values (dy) by the change in x values (dx) using a 0.8 fixed point value. Then each time the x value is incremented the gradient is added to an accumulator, and when the accumulator rolls over it increments/decrements the y value.
This program has been designed to be able to handle lines going in any direction as it swaps the x and y values if dy is bigger than dx.
The points of the star are simply stored as immediate values in the program which were pre-calculated by me.
This video is not sped up but the tick speed has been set to 100 times speed.
This program took 10954 cycles to run (54 minutes 46.2 seconds at default Minecraft speed).
Join the URCL (Universal Reduced Computer Language) discord:
https://discord.gg/Nv8jzWg5j8
MPU 8 Specs:
• No command blocks or pistons
• 3.3 Hz clock speed (3 ticks or 0.3 seconds per clock pulse)
• 9 stage waterfall pipeline
• 12 general purpose simulated dual read registers (with automatic forwarding at 6 ticks)
• 8 bit word length
• 256 word instruction ROM x2
• 32 bit instruction length (that includes an 8 bit immediate value)
• VLIW architecture
• 32 bit hardware BCD converter
• 8 bit hardware multiplier
• 8 bit hardware divider
• 64x64 pixel display which can be shifted upwards 8 pixels whenever needed
• 1 frame buffer
• Full qwerty keyboard with arrow keys and function keys for user input
• 128 bytes of main RAM
• 512 bytes of screen RAM
• Up to 128 I/O ports
• External 8 kiB paging ROM for storing large amounts of data
• 13 testable flags
• 8 bit character set (a custom one, so not ASCII) which uses 4x8 characters
• Can be started, stopped and reset from the UI
• Almost fully compatible with URCL
MPU 8 ISA:
https://docs.google.com/spreadsheets/d/1KRoZNu5ic36-vcP-6llN8L27ZvLxW5ILiaOX5gcoAC4/edit?usp=sharing
If you want to support me creating these videos, my Patreon is:
https://www.patreon.com/modpunchtree
or my PayPal link is:
https://paypal.me/modpunchtree")
