Uploaded September 2025 | Updated September 2026, 2 weeks ago
For developing a SRAM compiler that is area efficient and performant expertise is needed but above all a lot transpiration and persistence; more so I would say than other circuits. Luckily we (e.g. ChipFlow) is developing one for IHP and their SG13G2 open source process. This work is done in the FlowSpace project funded by the German government. In this project, the Arrakeen python framework - presented at last years ORConf - is used so the resulting compiler will also be easily portable to other technologies. Porting to Sky130 and GF180MCU is in the planning. In the FlowSpace project, next to the compiler itself, extensions will be developed to radiation harden the resulting blocks.
In this presentation a little background will be given on SRAM compiler design followed by the current status of the compiler and the improvements done in the Arrakeen framework to make all this work possible.
For developing a SRAM compiler that is area efficient and performant expertise is needed but above all a lot transpiration and persistence; more so I would say than other circuits. Luckily we (e.g. ChipFlow) is developing one for IHP and their SG13G2 open source process. This work is done in the FlowSpace project funded by the German government. In this project, the Arrakeen python framework - presented at last years ORConf - is used so the resulting compiler will also be easily portable to other technologies. Porting to Sky130 and GF180MCU is in the planning. In the FlowSpace project, next to the compiler itself, extensions will be developed to radiation harden the resulting blocks.
In this presentation a little background will be given on SRAM compiler design followed by the current status of the compiler and the improvements done in the Arrakeen framework to make all this work possible.
