Uploaded November 2025 | Updated September 2026, 13 hours ago
CHAPTERS:
0:00 Introduction
0:05 Clock Domain Crossing Resolution and Peak RDL Implementation
15:30 RDL Transition: DESE to Peak RDL Migration
28:45 Cross-Domain Data Capture Methodology
40:15 Register Description Language Framework Updates
48:30 Linux Kernel Boot Process and IIO Driver Considerations
58:00 Remote Firmware Update Challenges for Pluto FPGA Board
1:12:00 Pluto Board Serial Port Configuration (TTY ACM0 vs TTY USB0)
1:22:30 FunCube Plus 2U CubeSat and Mode Dynamic Transponder Project
1:35:00 Dwingeloo Observatory Visit and AMSAT DL Symposium Recap
1:42:15 Article Pipeline Updates and Halloween Open House Event
1:48:30 Artemis II Precision Timing Equipment and Tracking Project
1:56:00 Deep Space Exploration Society and Amateur Radio Contributions
2:02:00 Oscilloscopes, Spectrum Analyzers, and USB Adapters
2:15:30 Closing Remarks and Future Plans
The team discussed and resolved various technical issues related to clock domain crossings and register management in their modem design, including improvements made with PeakRDL and solutions for data capture across clock domains. They explored transitioning from DesyRDL to Peak RDL for better register management in FPGA and ASIC implementations, while also addressing challenges with remote firmware updates and serial port connections for the Pluto board. The conversation ended with updates on ongoing projects including the FunCube Plus 2U CubeSat collaboration with AMSAT-UK, precision time and frequency equipment for Artemis II, and discussions about spectrum analyzers and network analyzers.
CHAPTERS:
0:00 Introduction
0:05 Clock Domain Crossing Resolution and Peak RDL Implementation
15:30 RDL Transition: DESE to Peak RDL Migration
28:45 Cross-Domain Data Capture Methodology
40:15 Register Description Language Framework Updates
48:30 Linux Kernel Boot Process and IIO Driver Considerations
58:00 Remote Firmware Update Challenges for Pluto FPGA Board
1:12:00 Pluto Board Serial Port Configuration (TTY ACM0 vs TTY USB0)
1:22:30 FunCube Plus 2U CubeSat and Mode Dynamic Transponder Project
1:35:00 Dwingeloo Observatory Visit and AMSAT DL Symposium Recap
1:42:15 Article Pipeline Updates and Halloween Open House Event
1:48:30 Artemis II Precision Timing Equipment and Tracking Project
1:56:00 Deep Space Exploration Society and Amateur Radio Contributions
2:02:00 Oscilloscopes, Spectrum Analyzers, and USB Adapters
2:15:30 Closing Remarks and Future Plans
The team discussed and resolved various technical issues related to clock domain crossings and register management in their modem design, including improvements made with PeakRDL and solutions for data capture across clock domains. They explored transitioning from DesyRDL to Peak RDL for better register management in FPGA and ASIC implementations, while also addressing challenges with remote firmware updates and serial port connections for the Pluto board. The conversation ended with updates on ongoing projects including the FunCube Plus 2U CubeSat collaboration with AMSAT-UK, precision time and frequency equipment for Artemis II, and discussions about spectrum analyzers and network analyzers.
