Uploaded November 2025 | Updated September 2026, 1 week ago
The Big-endian RISC-V Linux Adventure - Roan Richmond & Lawrence Hunter, Codethink
The latest RISC-V ISA specification allows for runtime configuration of the data endian between little and big. Since no one had done this before, we decided to investigate how difficult it would be to get an prototype Linux implementation running in big endian on an emulated RISC-V system such as under QEMU.
The talk goes from the description of the new ISA feature, our initial analysis and the modifications to software such as the Linux kernel, QEMU and OpenSBI and an overview of the issues that we found and how to fix them. This includes kvm and how that works with mixed endian kvm instances, and the modifications to kvmtool to make this work.
We conclude with how the project went, what we published and a call to arms to continue testing and fixing outstanding issues.
The Big-endian RISC-V Linux Adventure - Roan Richmond & Lawrence Hunter, Codethink
The latest RISC-V ISA specification allows for runtime configuration of the data endian between little and big. Since no one had done this before, we decided to investigate how difficult it would be to get an prototype Linux implementation running in big endian on an emulated RISC-V system such as under QEMU.
The talk goes from the description of the new ISA feature, our initial analysis and the modifications to software such as the Linux kernel, QEMU and OpenSBI and an overview of the issues that we found and how to fix them. This includes kvm and how that works with mixed endian kvm instances, and the modifications to kvmtool to make this work.
We conclude with how the project went, what we published and a call to arms to continue testing and fixing outstanding issues.
