Uploaded June 2026 | Updated September 2026, 3 weeks ago
FENIX: Enabling In-Network DNN Inference with FPGA-Enhanced Programmable Switches
Xiangyu Gao, Tsinghua University; Tong Li, Renmin University of China; Yinchao Zhang, Tsinghua University; Ziqiang Wang, Southeast University and Tsinghua University; Xiangsheng Zeng, Huazhong University of Science and Technology; Su Yao, Tsinghua University and BNRist; Ke Xu, Tsinghua University and Zhongguancun Laboratory
Machine learning (ML) is increasingly used in network data planes for advanced traffic analysis, but existing solutions (such as FlowLens, N3IC, BoS) still struggle to simultaneously achieve low latency, high throughput, and high accuracy. To address these challenges, we present FENIX, a hybrid in-network ML system that performs feature extraction on programmable switch ASICs and deep neural network inference on FPGAs. FENIX introduces a Data Engine that leverages a probabilistic token bucket algorithm to control the sending rate of feature streams, effectively addressing the throughput gap between programmable switch ASICs and FPGAs. In addition, FENIX designs a Model Engine to enable high-accuracy deep neural network inference in the network, overcoming the difficulty of deploying complex models on resource-constrained switch chips. We implement FENIX on a programmable switch platform that integrates a Tofino ASIC and a ZU19EG FPGA directly, and evaluate it on real-world network traffic datasets. Our results show that FENIX achieves microsecond-level inference latency and multi-terabit throughput with low hardware overhead, and delivers over 90% accuracy on mainstream network traffic classification tasks, outperforming the state of the art.
View the full NSDI '26 program at usenix.org/conference/nsdi26/technical-sessions
FENIX: Enabling In-Network DNN Inference with FPGA-Enhanced Programmable Switches
Xiangyu Gao, Tsinghua University; Tong Li, Renmin University of China; Yinchao Zhang, Tsinghua University; Ziqiang Wang, Southeast University and Tsinghua University; Xiangsheng Zeng, Huazhong University of Science and Technology; Su Yao, Tsinghua University and BNRist; Ke Xu, Tsinghua University and Zhongguancun Laboratory
Machine learning (ML) is increasingly used in network data planes for advanced traffic analysis, but existing solutions (such as FlowLens, N3IC, BoS) still struggle to simultaneously achieve low latency, high throughput, and high accuracy. To address these challenges, we present FENIX, a hybrid in-network ML system that performs feature extraction on programmable switch ASICs and deep neural network inference on FPGAs. FENIX introduces a Data Engine that leverages a probabilistic token bucket algorithm to control the sending rate of feature streams, effectively addressing the throughput gap between programmable switch ASICs and FPGAs. In addition, FENIX designs a Model Engine to enable high-accuracy deep neural network inference in the network, overcoming the difficulty of deploying complex models on resource-constrained switch chips. We implement FENIX on a programmable switch platform that integrates a Tofino ASIC and a ZU19EG FPGA directly, and evaluate it on real-world network traffic datasets. Our results show that FENIX achieves microsecond-level inference latency and multi-terabit throughput with low hardware overhead, and delivers over 90% accuracy on mainstream network traffic classification tasks, outperforming the state of the art.
View the full NSDI '26 program at usenix.org/conference/nsdi26/technical-sessions
