Uploaded January 2026 | Updated September 2026, 2 weeks ago
On day 3 of HiPEAC 2026 in Krakow, Polan, Deming Chen, the Abel Bliss Professor at the University of Illinois Urbana-Champaign, presented the opening keynote entitled, “AI and Hardware Co-Design: Taming Quality, Productivity, and Reliability”.
In his talk, he advocated generating AI models and hardware accelerators as paired solutions, and the concept of co-design principles and how this should extend to LLMs, focusing on model structures, dataflow architectures, and compiler optimizations to achieve substantial latency and energy efficiency gains.
He also discussed how AI–HW co-design also addresses emerging challenges in reliability, with a flow that integrates LLMs, formal verification, and hardware synthesis to bridge natural language specifications and silicon implementations. Together,he said this can enable end-to-end AI–hardware co-design to provide a coherent and scalable framework for taming design quality, productivity, and reliability in next-generation AI systems.
EE Times caught up with Deming Chen after his talk to capture some of what he was aiming to convey in terms of co-design and co-search and why it is necessary.
Watch the video interview here.
----
Also:
🎙 Listen to EE Times On Air podcasts on power, embedded, AI, and more: eetimes.com/podcasts/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
🎥 Don't miss an episode and subscribe to our YouTube channel: youtube.com/@eetimes747
Stay up to date with the latest news in the electronics industry
➡️ EE Times: eetimes.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
➡️ Power Electronics News: powerelectronicsnews.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
➡️ Embedded: embedded.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
➡️ EDN: edn.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
📰 Subscribe to our newsletters: aspencore.dragonforms.com/loading.do?omedasite=EventSubscription&pk=youtube
🖥️ Attend free tech webinars: eetimes.com/webinars/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
📈 Download free industry white papers: eetimes.com/techpapers/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
🎤 Check out our virtual events on EE Times: events.eetimes.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
🎉 Interested in advertising opportunities? Reach out to sales@aspencore.com
On day 3 of HiPEAC 2026 in Krakow, Polan, Deming Chen, the Abel Bliss Professor at the University of Illinois Urbana-Champaign, presented the opening keynote entitled, “AI and Hardware Co-Design: Taming Quality, Productivity, and Reliability”.
In his talk, he advocated generating AI models and hardware accelerators as paired solutions, and the concept of co-design principles and how this should extend to LLMs, focusing on model structures, dataflow architectures, and compiler optimizations to achieve substantial latency and energy efficiency gains.
He also discussed how AI–HW co-design also addresses emerging challenges in reliability, with a flow that integrates LLMs, formal verification, and hardware synthesis to bridge natural language specifications and silicon implementations. Together,he said this can enable end-to-end AI–hardware co-design to provide a coherent and scalable framework for taming design quality, productivity, and reliability in next-generation AI systems.
EE Times caught up with Deming Chen after his talk to capture some of what he was aiming to convey in terms of co-design and co-search and why it is necessary.
Watch the video interview here.
----
Also:
🎙 Listen to EE Times On Air podcasts on power, embedded, AI, and more: eetimes.com/podcasts/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
🎥 Don't miss an episode and subscribe to our YouTube channel: youtube.com/@eetimes747
Stay up to date with the latest news in the electronics industry
➡️ EE Times: eetimes.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
➡️ Power Electronics News: powerelectronicsnews.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
➡️ Embedded: embedded.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
➡️ EDN: edn.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
📰 Subscribe to our newsletters: aspencore.dragonforms.com/loading.do?omedasite=EventSubscription&pk=youtube
🖥️ Attend free tech webinars: eetimes.com/webinars/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
📈 Download free industry white papers: eetimes.com/techpapers/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
🎤 Check out our virtual events on EE Times: events.eetimes.com/?utm_source=eetimes_youtube&utm_medium=social&utm_campaign=description
🎉 Interested in advertising opportunities? Reach out to sales@aspencore.com
![Distributed Intelligence Is Key to Scaling Physical AI
In this video interview, Rafael Sotomayor, President and CEO of NXP Semiconductors, explains why scaling physical AI is not just about building bigger brains, but about putting the right intelligence in the right place. He tells EE Times Executive Editor, Nitin Dahad, “If we are to scale physical AI for humanoids, we need to ask ourselves: how do we mimic the human body?”
In order to do this Sotomayor explains NXP’s view of the architecture required for this: the neural axis architecture. This is a distributed approach to placing the right level of intelligence of each layer needed for physical AI: the reasoning layer, the coordination layer, and the reflex layer.
Based on this, he said, “There’s a spectrum [of intelligence] that makes a humanoid useful.”
Watch the video interview with Rafael Sotomayor here to learn more about this concept and how it addresses the challenge of scaling physical AI.
#physicalAI #neuralaxisarchitecture #reasoninglayer #coordinationlayer
#reflexlayer Distributed Intelligence Is Key to Scaling Physical AI](https://i.ytimg.com/vi/_kvXsfMrgHo/mqdefault.jpg)









