HC27-S2: Multimedia and Signal Processing @hotchipsvideos
HC27-S2: Multimedia and Signal Processing  @hotchipsvideos
Uploaded February 2016 | Updated September 2026, 3 weeks ago
Session 2, Hot Chips 27 (2015), Monday, August 24, 2015.

Architecture of the V6x Hexagon DSP for Mobile Imaging and Always-On Applications
Lucian Codrescu, Eric Mahurin, Mao Zeng, Erich Plondke, Suresh Venkumahanti and Rick Maule, Qualcomm

A Scalable Heterogeneous Multicore Architecture for ADAS
Zoran Nikolic, Rama Venkatasubramanian, Jason Jones and Peter Labaziewicz, TI

Energy Efficient Graphics and Multi-media in 28nm Carrizo APU
Guhan Krishnan, Dan Bouvier, Praveen Dongara and Louis Zhang, AMD

Revisiting DSP Acceleration with the Kalray MPPA Manycore Processor
Benoît Dupont de Dinechin, Kalray
HC27-S2: Multimedia and Signal ProcessingHC20-T2: Scalable Parallel Programming with CUDAHC2025-S1: CPUsHC28-S6: Emerging EmbeddedHC29-S2: IOT/EmbeddedHC29-S5: FPGAsHC33-T2.2: Advanced Packaging, Part 2HC2025-R2: TCMM Awards and Closing RemarksHC30-K1: Spectre/MeltdownHC18-S3: Memory and StorageHC34-S3: AcademiaHC28-S1: GPUs and HPC Processors
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HC27-S2: Multimedia and Signal Processing

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