ferrisstreamsstuff | Ferris Makes Hardware Ep.005 - Improving the Core Again @ferrisstreamsstuff | Uploaded 6 years ago | Updated 3 hours ago
Let's try and simplify the xenowing's CPU core a bit further by getting the compiler to infer usage of internal FPGA memory instead of building mem cells explicitly with registers and muxes. Figuring out what the compiler needs to do this may not be as straightforward as you think!
Project repo: github.com/yupferris/xenowing
Episode playlist: youtube.com/playlist?list=PL-sXmdrqqYYeDcTxD-t6i-lgzmzbjKOBe
Follow me on twitter for updates on when I'll be streaming and other such nonsense! twitter.com/ferristweetsnow
Recorded on February 24 2018
Let's try and simplify the xenowing's CPU core a bit further by getting the compiler to infer usage of internal FPGA memory instead of building mem cells explicitly with registers and muxes. Figuring out what the compiler needs to do this may not be as straightforward as you think!
Project repo: github.com/yupferris/xenowing
Episode playlist: youtube.com/playlist?list=PL-sXmdrqqYYeDcTxD-t6i-lgzmzbjKOBe
Follow me on twitter for updates on when I'll be streaming and other such nonsense! twitter.com/ferristweetsnow
Recorded on February 24 2018
