Chipalooza Analog and Mixed-Signal Design Challenge @efabless_channel
Chipalooza Analog and Mixed-Signal Design Challenge  @efabless_channel
Uploaded February 2024 | Updated September 2026, 2 hours ago
The next generation of Caravel harness chip will be a major enhancement of the existing Caravel chip, targeting IoT machine learning applications by giving the designer many more resources to choose from than a processor.
IoT applications connect to the real world, so they need analog-to-digital and digital-to-analog conversion, signal conditioning (amplifiers, biasing, and filtering), analog signal processing, power management (to maintain ultra-low power consumption for battery-operated applications), temperature sensing, and more.

In this design challenge, we invite designers to create open-source chip-based IP for IoT machine learning applications.

What is covered in the video:
- Introduction to the Design Challenge
- Technical Deep Dive into the Caravel Harness Chip
- Benefits of Participating in the Challenge
- Q&A Session
Chipalooza Analog and Mixed-Signal Design ChallengeEfabless SoC Design RequestGo Configure Design Challenge SeriesWebinar #1 - Design Challenge WalkthroughSKY130 - Start Designing Analog/Digital In 5 minutes - DRAFT CUTSilicon Showcase - Matt Venn - VGA ClockHow we fixed Caravel - An interview with Andy WrightWebinar #4   Advanced Circuit Simulation   Part IIOpen-source Chip Design Flow for Silicon SovereigntyWebinar #2 - Circuit SimulationchipIgnite update & AI designed ASIC competitionSilicon Showcase - Matt Venn - Frequency Counter
Efabless |

Chipalooza Analog and Mixed-Signal Design Challenge

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