Uploaded August 2026 | Updated September 2026, 2 weeks ago
Explore the Canvas environment in Arm Socrates. Watch a demonstration on how to view, modify, and optimize a NoC-SE generated microarchitecture using both the Logical Canvas and Physical Canvas.
Learn how to navigate networks and components, edit microarchitecture parameters, create checkpoints, adjust interface settings to meet timing requirements, and use the Property Editor to fine-tune connectivity. The video also covers physical design optimization workflows, including inserting Device Credit Slices (DCS), assigning routes, validating routing, and running microarchitecture design rule checks.
Whether you're designing Arm-based SoCs or optimizing interconnect implementations, this session provides practical guidance for refining NoC microarchitecture and addressing physical design constraints within the Socrates platform.
In this video:
Understanding Logical Canvas vs. Physical Canvas
Managing visible and editable networks
Viewing and modifying microarchitecture parameters
Creating and restoring design checkpoints
Adjusting latency and channel credit settings
Optimizing designs for timing closure
Adding Device Credit Slices (DCS)
Assigning and validating network routes
Running Microarchitecture Design Rule Checks (DRC)
Best practices for NoC implementation refinement
Stay connected with Arm: arm.com
Explore the Canvas environment in Arm Socrates. Watch a demonstration on how to view, modify, and optimize a NoC-SE generated microarchitecture using both the Logical Canvas and Physical Canvas.
Learn how to navigate networks and components, edit microarchitecture parameters, create checkpoints, adjust interface settings to meet timing requirements, and use the Property Editor to fine-tune connectivity. The video also covers physical design optimization workflows, including inserting Device Credit Slices (DCS), assigning routes, validating routing, and running microarchitecture design rule checks.
Whether you're designing Arm-based SoCs or optimizing interconnect implementations, this session provides practical guidance for refining NoC microarchitecture and addressing physical design constraints within the Socrates platform.
In this video:
Understanding Logical Canvas vs. Physical Canvas
Managing visible and editable networks
Viewing and modifying microarchitecture parameters
Creating and restoring design checkpoints
Adjusting latency and channel credit settings
Optimizing designs for timing closure
Adding Device Credit Slices (DCS)
Assigning and validating network routes
Running Microarchitecture Design Rule Checks (DRC)
Best practices for NoC implementation refinement
Stay connected with Arm: arm.com
