Uploaded August 2026 | Updated September 2026, 1 week ago
This video walks through the High-Level Specification (HLS) configuration flow for Arm SI L1 using the Interconnect Architect tool in Arm Socrates. Learn how to define SoC domain hierarchies, configure clock, power, and voltage domains, create and manage interfaces, configure MCNs, define paths and access maps, and validate your design using HLS Design Rule Checks (DRC).
In this step-by-step training session, you'll see how to:
Configure internal and external clock domains
Set global interconnect parameters and protocol settings
Create and configure ASNI, AMNI, CMNI, and MCN interfaces
Define paths and connectivity between interconnect components
Configure memory access maps and address mapping
Use path metrics, stripe groups, and interface configuration tools
Run HLS design rule checks (DRC) to validate the design
Prepare an SI L1 design for topology generation and the next stages of the interconnect development flow
Whether you're new to Interconnect Architect or looking to better understand the SI L1 design workflow, this video provides a practical overview of the key HLS configuration steps required before generating and optimizing the interconnect topology.
Stay connected with Arm: arm.com
This video walks through the High-Level Specification (HLS) configuration flow for Arm SI L1 using the Interconnect Architect tool in Arm Socrates. Learn how to define SoC domain hierarchies, configure clock, power, and voltage domains, create and manage interfaces, configure MCNs, define paths and access maps, and validate your design using HLS Design Rule Checks (DRC).
In this step-by-step training session, you'll see how to:
Configure internal and external clock domains
Set global interconnect parameters and protocol settings
Create and configure ASNI, AMNI, CMNI, and MCN interfaces
Define paths and connectivity between interconnect components
Configure memory access maps and address mapping
Use path metrics, stripe groups, and interface configuration tools
Run HLS design rule checks (DRC) to validate the design
Prepare an SI L1 design for topology generation and the next stages of the interconnect development flow
Whether you're new to Interconnect Architect or looking to better understand the SI L1 design workflow, this video provides a practical overview of the key HLS configuration steps required before generating and optimizing the interconnect topology.
Stay connected with Arm: arm.com
