Uploaded February 2026 | Updated September 2026, 1 week ago
Abstract
As AI training clusters grow to encompass thousands of GPUs, the backend network faces unique traffic challenges that break traditional data center designs. The synchronized nature of AI workloads creates massive, bursty elephant flows where standard ECMP hashing often results in collisions, congestion, and significant job completion delays.
This session provides a technical deep-dive into Microsoft's deployment of SRv6 to solve these challenges in the AI backend. We will detail the specific traffic characterization of large-scale training jobs and compare NIC-based versus switch-based load balancing techniques. The presentation focuses on our shift to deterministic multipathing using Source Routing (SRv6) to ensure conflict-free traffic placement.
Attendees will gain insight into the real-world implementation of SRv6 uSID within the SONiC network operating system. We will share operational data, discussing how we deploy, monitor, and troubleshoot this architecture in production, moving beyond theory to practical application in one of the world’s largest AI infrastructures.
Pablo Camarillo:
Pablo Camarillo is a Principal Engineer at Cisco, where he acts as one of the lead architects driving SRv6 technology. He focuses on building hyperscale fabrics and facilitating the deployment of SRv6 across global providers. An active IETF contributor and the lead editor of RFC 8986, Pablo architected SRv6 uSID to deliver unified, high-performance network fabrics.
In his current role, he bridges the gap between silicon capabilities and network architecture, leveraging Cisco Silicon One to deliver breakthrough performance features. He actively contributes to open-source projects like FD.io VPP and SAI/SONiC. A co-author of the SRv6 book and holder of over 50 issued patents, Pablo is a double recipient of Cisco’s Pinnacle Award (2016 & 2025).
On the weekends you will find him flying airplanes and mountain biking around Madrid.
nanog.org/events/nanog-96/content/5611
Abstract
As AI training clusters grow to encompass thousands of GPUs, the backend network faces unique traffic challenges that break traditional data center designs. The synchronized nature of AI workloads creates massive, bursty elephant flows where standard ECMP hashing often results in collisions, congestion, and significant job completion delays.
This session provides a technical deep-dive into Microsoft's deployment of SRv6 to solve these challenges in the AI backend. We will detail the specific traffic characterization of large-scale training jobs and compare NIC-based versus switch-based load balancing techniques. The presentation focuses on our shift to deterministic multipathing using Source Routing (SRv6) to ensure conflict-free traffic placement.
Attendees will gain insight into the real-world implementation of SRv6 uSID within the SONiC network operating system. We will share operational data, discussing how we deploy, monitor, and troubleshoot this architecture in production, moving beyond theory to practical application in one of the world’s largest AI infrastructures.
Pablo Camarillo:
Pablo Camarillo is a Principal Engineer at Cisco, where he acts as one of the lead architects driving SRv6 technology. He focuses on building hyperscale fabrics and facilitating the deployment of SRv6 across global providers. An active IETF contributor and the lead editor of RFC 8986, Pablo architected SRv6 uSID to deliver unified, high-performance network fabrics.
In his current role, he bridges the gap between silicon capabilities and network architecture, leveraging Cisco Silicon One to deliver breakthrough performance features. He actively contributes to open-source projects like FD.io VPP and SAI/SONiC. A co-author of the SRv6 book and holder of over 50 issued patents, Pablo is a double recipient of Cisco’s Pinnacle Award (2016 & 2025).
On the weekends you will find him flying airplanes and mountain biking around Madrid.
nanog.org/events/nanog-96/content/5611
