Uploaded November 2025 | Updated September 2026, 2 weeks ago

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2025 US LLVM Developers' Meeting

llvm.org/devmtg/2025-10

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Title: Generating efficient CPU code with MLIR for scalable vector extensions in an end-to-end case study

Speakers: Ege Beysel, Andrzej Warzyński
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Slides: llvm.org/devmtg/2025-10/slides/quick_talks/beysel_warzynski.pdf

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This talk demonstrates how to generate efficient CPU code for AI workloads using IREE's MLIR-based compiler infrastructure with emphasis on ARM's Scalable Vector and Matrix Extensions (SVE and SME). We explore the integration of SVE and SME code generation into IREE, covering compilation strategies, vectorization techniques, and targeting two AI centric architecture features, namely FEAT_BF16 and FEAT_I8MM.

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