How to replace the LCD on a TRS-80 PC-3 or Sharp PC-1250/1/5 pocket computer Robert Baruch 2020-01-31 | I created replacement LCDs for the TRS-80 PC-3 and Sharp PC-1250/PC-1251/PC-1255 pocket computer because many of the original LCDs have turned splotchy. You can buy these LCDs here: lectronz.com/products/lcd-replacement-for-trs-80-pc-3-sharp-pc-125xAlso, please don't dispose of acetone down the drain. In many localities it's classed as a hazardous waste, so collect it in a metal or glass container, and deposit it at your friendly local hazardous waste center.
Neos Wizardry (WIP) Robert Baruch 2021-08-17 | A game I'm working on in VR. It's a huge learning experience, and an even bigger effort!Neos: neos.com
How to replace the LCD on a Sharp PC-1246/1247 pocket computer Robert Baruch 2021-08-17 | I created replacement LCDs for the Sharp PC-1246 pocket computer for those whose LCDs have broken or turned splotchy. You can buy these LCDs here: lectronz.com/products/lcd-replacement-for-sharp-pc-1246-pc-1247
Building stuff in Neos: Flax Bed Minigame from ATITD, part 2 (LogiX) Robert Baruch 2021-07-06 | I build the Flax Bed minigame from A Tale in the Desert, completely in Neos.Neos: neos.comATITD: atitd.com
Building stuff in Neos: Flax Bed Minigame from ATITD, part 1 Robert Baruch 2021-07-04 | I build the Flax Bed minigame from A Tale in the Desert, completely in Neos.Neos: neos.comATITD: atitd.com
LMARV-1 reboot part 14: Chips that dont exist Robert Baruch 2021-02-05 | I talk about chips that don't exist, and what I'm gonna do about it.Project Bureau (ATF150x fuse stuff): whitequark.github.io/prjbureaunMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 13: More sequencer schematicking Robert Baruch 2021-01-29 | Working on the schematic for the sequencer.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 12: The sequencer Robert Baruch 2021-01-22 | Working on the schematic for the sequencer.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 11: The crossbar Robert Baruch 2021-01-15 | Here's the "crossbar", which is a generic card which takes N 32-bit inputs, multiplexes them, and is either registered or buffered on the output. The sequencer will need eight of these crossbars, all different.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 10: Some errors, some schematics Robert Baruch 2021-01-08 | A somewhat short video this time, catching some errors, and trying out some schematics.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 9: Refactoring, final proof, and a ROM! Robert Baruch 2021-01-01 | Short video this time, just a few refactorings in prep for starting on the actual schematics. The ROM I've chosen to run the sequencer is a Flash ROM with an access time of 70ns, so I think a 10MHz system clock (100ns per cycle) is optimistic. I'll likely use 6MHz so that I have a 1MHz machine cycle.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 8: Exploring layout for multiplexed registers Robert Baruch 2020-12-25 | Now that the code is mostly cleaned up, I'm exploring how to lay out the sequencer, starting with a multiplexed register module.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
Live programming 2: LMARV-1 RISCV Robert Baruch 2020-12-20 | More converting bits of the abstract code to chips!Opening animation credits: * Background: Videezy.com * Audio: mixkit.co/free-stock-music/house-and-electronica (Deep Techno Ambienceby Alejandro Magaña (A. M.))nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
Live programming: LMARV-1 RISCV Robert Baruch 2020-12-19 | Starting to convert bits of the abstract code to chips!Opening animation credits: * Background: Videezy.com * Audio: mixkit.co/free-stock-music/house-and-electronica (Deep Techno Ambienceby Alejandro Magaña (A. M.))nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 7: Interrupts and exceptions, code complete???! Robert Baruch 2020-12-18 | This part explains mostly correctly how interrupts and exceptions work. And, that pretty much completes the initial phase of the project. Now to clean things up and make it mappable to real hardware. That isn't on an FPGA.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 6: About CSRs and interrupts Robert Baruch 2020-12-11 | This part explains a bit about CSRs (Control and Status Registers) and how interrupts get handled.nMigen exercises: github.com/RobertBaruch/nmigen-exercises/blob/main/README.mdgithub repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 5: formal verification of the CPU Robert Baruch 2020-12-04 | This part explains a bit about a more rigorous version of the formal verification that I've been doing -- prove mode. And we build the CPU by hooking up all the cards, and then formally verifying it.Also, for some reason at the end I channel Cody's Lab.github repo for code: github.com/RobertBaruch/riscv-rebootRISC-V specs: riscv.org/technical/specificationsnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 4: the sequencer Robert Baruch 2020-11-27 | This part explains and does a little bit of formal verification on the sequencer card.github repo for code: github.com/RobertBaruch/riscv-rebootnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
LMARV-1 reboot part 3: the shifter and ALU Robert Baruch 2020-11-20 | This part codes and formally verifies the shifter and ALU cards.github repo for code: github.com/RobertBaruch/riscv-rebootnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.mdhackaday.io 74-series logic RISC-V project: hackaday.io/project/18491-worlds-first-32bit-homebrew-cpu
LMARV-1 reboot part 2: the register card. Robert Baruch 2020-11-13 | This part codes and formally verifies an async memory and the register card.github repo for code: github.com/RobertBaruch/riscv-rebootnMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.md
Rebooting the LMARV-1 RISC-V project! Robert Baruch 2020-11-06 | It's been two years since I last worked on the Tangible RISC-V project, LMARV-1 (Learn Me A RISC-V version 1). I went about it wrong, and I've finally decided to do it right this time.nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial/blob/master/README.mdThe code for this video: github.com/RobertBaruch/riscv-reboot
The Wegstr CNC prototyping mill Robert Baruch 2020-07-01 | How is it at making printed circuit boards? This is my first try, and it's not that bad. Here are some answers to the obvious questions:* wegstr.com* Did I say "speed vs time"?! I meant "quality vs time". Or maybe "price vs time". As they say, "Price, quality, time: choose two."* Yes, I know about Othermill/Bantam. I wanted to try this one. Also, apparently Bantam doesn't do multi-point levelling.* If you chemically etch, you deal with nasty chemicals. And even if you're fine with that, you're prone to over-etch, and then you still have to drill. This can "etch", and drill, and cut slots and various board shapes.* It seems like it can do 8 mil trace-and-space but I wouldn't go lower than a space of 10 mil.* I have no idea how long the bits last.* I was conservative because I didn't know if the bits would break.* The whole process is highly error-prone.* It could take a day to make one board, as opposed to about a week for five from China. You can do solder mask. This is for one-off prototypes and tests. For anything more, go to China.* I haven't done a double-sided board with it. I'm not sure how to fixture it for alignment. One video from wegstr shows that they milled out a negative for the board in the XY table, pop it in, and engrave out the bottom side.
Atari Battlezone arcade (1980) repair, part 5 Robert Baruch 2020-06-27 | In part 4, I saw that the tanks were quite dim. Also I remembered that there were supposed to be mountains? Adjusting the contrast control on the monitor board fixed things right up. Here's some gameplay!
Atari Battlezone arcade (1980) repair, part 4 Robert Baruch 2020-06-27 | I bought a 1980 Atari Battlezone arcade from Craigslist, "complete but not working". I finally get it working after having it sit around unfinished for the past year and a half. The reason for it not working surprised me.This game was the third of the first three vector graphics games released by Atari, the first two being Lunar Lander (1979) and Asteroids (1979). I apparently chose the least popular of them all :)
More translations from English to Lojban. Robert Baruch 2020-04-18 | It seems like it's getting easier to translate. More practice? Or am I just fooling myself?
Feedback about my translation Robert Baruch 2020-04-17 | Not only feedback, but great suggestions and things I learned!
Live translating the second sentence in The Hobbit into Lojban Robert Baruch 2020-04-14 | Just chillin' out, hiding from the Coronavirus with my cat, and translating the second sentence in The Hobbit into Lojban.
Lojban 5: Sentence separators, connectives, and discursives Robert Baruch 2020-04-12 | Lojban is a constructed language. One of its features that really attracted me was its unambiguous parsing when written or spoken. This means that it could be used as a natural human/machine interlingua.Part 5 shows how sentences are separated, how to use connectives or conjunctions, and the incredible usefulness of discursives.selma'o I: mw.lojban.org/papri/BPFK_Section:_Text_Structure_cmavoConnectives: mw.lojban.org/papri/BPFK_Section:_Logical_ConnectivesDiscursives: mw.lojban.org/papri/BPFK_Section:_DiscursivesThe Unofficial Complete Lojban Language (updated for 2020): http://lojban.pw/Online dictionary: http://vlasisku.lojban.orgOnline parser: http://lojban.github.io/ilmentufa/camxes.htmlLatest version of Lojban reference: mw.lojban.org/papri/Category:BPFK_Section
Cat kneading Robert Baruch 2020-04-11 | Just a cat, kneading. Making bread. Puddy-pawing. Giving the blanket acupuncture.
Lojban 4: Modals and Events Robert Baruch 2020-04-05 | Lojban is a constructed language. One of its features that really attracted me was its unambiguous parsing when written or spoken. This means that it could be used as a natural human/machine interlingua.Part 4 goes into how to add places to a selbri that doesn't have the place you need. Also, event sumti.Errata:This sentence is ungrammatical:lo nu mlatu kei krinu lo nu la .internet.Cats are the justification for the Internet.It should be:lo nu mlatu kei krinu lo nu la .internet. zastiCats are the justification for the Internet existing.Or, this:lo nu mlatu kei krinu lo nu mujysamseltcanaCats are the justification for the Internet.All the modals: mw-live.lojban.org/papri/Category:BPFK_Sections_including_selma%27o_BAIWhy cats are the justification for the Internet: en.wikipedia.org/wiki/Cute_cat_theory_of_digital_activismThe Complete Lojban Language (1997): http://lojban.github.io/cllOnline dictionary: http://vlasisku.lojban.orgOnline parser: http://lojban.github.io/ilmentufa/camxes.htmlLatest version of Lojban reference: mw.lojban.org/papri/Category:BPFK_Section
Lojban 3: Numbers Robert Baruch 2020-04-03 | Lojban is a constructed language. One of its features that really attracted me was its unambiguous parsing when written or spoken. This means that it could be used as a natural human/machine interlingua.Part 3 goes into some of the number words and how to use them.Errata: 7 is ze, not za.Also, "ci mi cu xabju le kumyzda" is actually reasonable. It means "Three of us live in the apartment".Digits reference: mw.lojban.org/papri/BPFK_Section:_Digits Inexact numbers reference: mw.lojban.org/papri/BPFK_Section:_Inexact_NumbersConstants reference: mw.lojban.org/papri/BPFK_Section:_Mathematical_ConstantsHow to *really* use lo and le: mw.lojban.org/papri/How_to_use_xorloThe Complete Lojban Language (1997): http://lojban.github.io/cllOnline dictionary: http://vlasisku.lojban.orgOnline parser: http://lojban.github.io/ilmentufa/camxes.htmlLatest version of Lojban reference: mw.lojban.org/papri/Category:BPFK_Section
Lojban 2: gadri and the typicals Robert Baruch 2020-03-31 | Lojban is a constructed language. One of its features that really attracted me was its unambiguous parsing when written or spoken. This means that it could be used as a natural human/machine interlingua.Part 2 goes into gadri and typicals, which function like English articles.Errata:This sentence doesn't mean what I thought it meant: "mi selcme la .rabrt." Instead I should use "mi selcme zo .rabrt.", or "mi du la .rabrt.", or just "mi'e .rabrt."gadri reference: mw.lojban.org/papri/BPFK_Section:_gadritypicals reference: mw.lojban.org/papri/BPFK_Section:_TypicalsJu'i Lobypli #12: mw.lojban.org/papri/me_lu_ju%27i_lobypli_li%27u_12_moiRules for Lojbanizing names: http://lojban.github.io/cll/4/8 (Note that the restriction on la, lai, or doi in a name has been lifted, as long as you put dots on both sides of the name)The Complete Lojban Language (1997): http://lojban.github.io/cllOnline dictionary: http://vlasisku.lojban.orgOnline parser: http://lojban.github.io/ilmentufa/camxes.htmlLatest version of Lojban reference: mw.lojban.org/papri/Category:BPFK_Section
Introduction to Lojban Robert Baruch 2020-03-27 | Lojban is a constructed language. One of its features that really attracted me was its unambiguous parsing when written or spoken. This means that it could be used as a natural human/machine interlingua.All obvious mistakes in the video were obvious after the fact (like ne'i vs ni'e, renma vs remna). I wish I had pair-programmed this thing. Ah well.The Complete Lojban Language (1997): http://lojban.github.io/cllOnline dictionary: http://vlasisku.lojban.orgOnline parser: http://lojban.github.io/ilmentufa/camxes.htmlLatest version of Lojban reference: mw.lojban.org/papri/Category:BPFK_SectionAnd for an entirely different take on Lojban: youtube.com/watch?v=l-unefmAo9kGraphics used are CC-BY-SA:Telescope graphic by Icon Lauk from the Noun ProjectDie graphic by ladhina from the Noun ProjectDead graphic by Igé Maulana from the Noun ProjectCellar graphic by Andrejs Kirma from the Noun ProjectSeller graphic by Grégory Montigny from the Noun ProjectWeight graphic by Universal Icons from the Noun ProjectManagement graphic by IconPai from the Noun ProjectCat graphic by dDara from the Noun Project
Building a 6800 CPU on an FPGA with nMigen (part 11) Robert Baruch 2020-01-26 | In this video, I attempt many different optimizations, and end up with an 18% reduction in LUTs. No single optimization turns out to be the magic one, and it's questionable whether even the 18% improvement was worth it.Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.11.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 10) Robert Baruch 2020-01-19 | Oh, no, it's another video where code gets written and words are spoken! I add the last instructions: RTI, WAI, and SWI, and interrupt capability, and clean up some formal verification code.Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.10.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 9) Robert Baruch 2020-01-13 | Oh, no, it's another video where code gets written and words are spoken! I add the rest of the instructions, except for RTI, WAI, and SWI.Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.09.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 8) Robert Baruch 2020-01-09 | Oh, no, it's another video where code gets written and words are spoken! I add the instruction block between 0x40 and 0x7F.Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.08.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 7) Robert Baruch 2020-01-05 | Oh, no, it's another video where code gets written and words are spoken! I add the branch relative instructions and some flags-related instructions.Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.07.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 6) Robert Baruch 2020-01-05 | Oh, no, it's another video where code gets written and words are spoken! I add the direct, immediate, and indexed addressing modes to all the instructions.Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.06.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 5) Robert Baruch 2020-01-02 | Oh, no, it's another video where code gets written and words are spoken! I add the STA, AND, BIT, CMP, EOR and ORA instructions, and all the instructions can now operate on accumulator B. Also, the CPU is loaded onto the ice40 board and it works!Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.05.1nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 4) Robert Baruch 2019-12-31 | Oh, no, it's another video where code gets written and words are spoken! I regret having indulged in premature optimization, add the ADD, ADC, SUB, SBC and LDA A instructions, and do some refactoring to make instruction implementation easier. The ALU gets bigger and is formally verified.Get the code for for this video on github! github.com/RobertBaruch/n6800/tree/0.04.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorialGuzTech's SpinalHDL implementation for video 3: github.com/GuzTech/shdl6800
Building a 6800 CPU on an FPGA with nMigen (part 3) Robert Baruch 2019-12-25 | Oh, no, it's another video where code gets written and words are spoken! I start on the basic framework of the CPU, code up some instructions, and simulate and formally verify them.Get the code for this video on github! github.com/RobertBaruch/n6800/tree/0.03.0nMigen tutorial: github.com/RobertBaruch/nmigen-tutorial
Building a 6800 CPU on an FPGA with nMigen (part 2) Robert Baruch 2019-12-21 | 6800 CPUs are getting rare. Let's build one on an FPGA with nMigen, a Python-based Hardware Description Language.nMigen tutorial: github.com/RobertBaruch/nmigen-tutorialnMigen github repo: github.com/m-labs/nmigen/tree/master/nmigennMigen_boards github repo: github.com/m-labs/nmigen-boards/tree/master/nmigen_boardsClocky image CC BY 3.0 (Artur Tarwacki) Source: en.wikipedia.org/wiki/Clocky#/media/File:Clocky_almond_panorama1680.jpg
Building a 6800 CPU on an FPGA with nMigen (part 1) Robert Baruch 2019-12-13 | 6800 CPUs are getting rare. Let's build one on an FPGA with nMigen, a Python-based Hardware Description Language.nMigen tutorial: github.com/RobertBaruch/nmigen-tutorialAlltek Bally CPU replacement boards: allteksystems.com
Decapsulating a plastic packaged IC with hot sulfuric acid Robert Baruch 2019-10-04 | My procedure for decapsulating a plastic packaged IC using hot sulfuric acid. The sulfuric acid is 98% concentrated (i.e. azeotropic), and heated to 200 degrees C. Then the chip is left in the flask for 10 minutes at that temperature, then allowed to cool. This is sufficient to dissolve/dehydrate/oxidize the plastic package and leave the die remaining.I wash the die with distilled water, and optionally acetone, although I'm moving away from that and just trying compressed air.And yes, I know the slope-sided container is a flask, not a beaker :)
Very Basic Introduction to Formal Verification Robert Baruch 2019-07-22 | This is an extremely basic introduction to getting up and running with formally verifying modules written in Verilog using the open source tools Yosys and SymbiYosys. I'm definitely no expert, I'm just getting started. But hopefully this can help you get started too, so you can then find other resources to become better at it.Installation cheat sheet: docs.google.com/document/d/1O4ql42YJcig84rhgrAEA04R7u-7LIisieX5QDgd68aI/editSome more advanced tutorials: zipcpu.com
Creating IC symbols quickly in KiCAD 5 Robert Baruch 2019-07-06 | BitPreserve is a github repo for KiCAD schematics of classic computers that anyone can contribute to. However, with older machines come older chips, and the KiCAD standard libraries just don't have these older chips. Now you have to make your own symbols! This is how I quickly create an IC symbol in KiCAD 5 that conforms to the KiCAD library standard.The standard: http://kicad-pcb.org/libraries/klcBitPreserve: github.com/baldengineer/bit-preserve
Fixing ALL the TRS-80 PC-1 computers, part 3 Robert Baruch 2019-06-02 | The LCDs have come in, and are available for sale!You can buy them here: lectronz.com/products/lcd-replacement-for-trs-80-pc-1-sharp-pc-1211Video instructions: youtube.com/watch?v=S8Vagc0FJK8
Philips EE2000 Electronic Laboratory Robert Baruch 2019-04-21 | When I was around 8 years old, around 1980 or so, my dad brought home a Philips EE2000 Electronic Laboratory from West Germany. I loved it, but could never get anything to work. Over the years all the components got lost and/or rusted, and eventually the whole thing was trashed. Fast forward many decades later, and I managed to get a complete one on eBay in Germany. In this video, I check out the components, replace the failed ones, and build a circuit that works.About the Philips EE2000 kit: https://ee.old.no/2000/Music: "Right This Way Sir" CC-BY Caar Lemar: soundcloud.com/caar-lemar/right-this-way-sir
